SEGGER RTT does not require any additional pin or hardware, despite a J-Link connected via the standard debug port to the target. It does not require any configuration of the target or debugging environment and can even be used with varying target speeds. The only differences I can see are the 302 supports USB Device only, while the others have OTG support. Has anybody got the STM32F302 working as a usb device using the HAL drivers and STM32Cube? I am using Visual Studio 2013 pro and the latest version of VisualGDB. When it identified the 3rd-party applications using JLinkARM.dll I selected the Keil MDK V5.17 (DLL V5.02 in 'C: Leilv5 ARM Segger'). When I plug the nRF52 board into the USB port and turn it on it is recognized in the device manager under 'Other devices' as 'J-Link' but the device driver is not installed.

• Drivers Segger Port Devices Gigabit
• Drivers Segger Port Devices Lucie
• Drivers Segger Port Devices Usb
• Drivers Segger Port Devices Inc

J-Link comes not only with a GDB server, but with a complete set of drivers and utilities, packed by SEGGER separately for each platform. The same distribution includes drivers for all J-Link probes, so installation is quite simple. The J-Link binaries are available from the SEGGER site.

Overview¶

All Nordic nRF5x Development Kits, Preview Development Kits and Dongles are equippedwith a Debug IC (Atmel ATSAM3U2C) which provides the following functionality:

• Segger J-Link firmware and desktop tools
• SWD debug for the nRF5x IC
• Mass Storage device for drag-and-drop image flashing
• USB CDC ACM Serial Port bridged to the nRF5x UART peripheral
• Segger RTT Console
• Segger Ozone Debugger

Segger J-Link Software Installation¶

To install the J-Link Software and documentation pack, follow the steps below:

1. Download the appropriate package from the J-Link Software and documentation pack[9] website
2. Depending on your platform, install the package or run the installer
3. When connecting a J-Link-enabled board such as an nRF5x DK, PDK or dongle, adrive corresponding to a USB Mass Storage device as well as a serial port should come up

Drivers Segger Port Devices Gigabit

nRF5x Command-Line Tools Installation¶

The nRF5x command-line Tools allow you to control your nRF5x device from the command line,including resetting it, erasing or programming the flash memory and more.

To install them, use the appropriate link for your operating system:

After installing, make sure that nrfjprog is somewhere in your executable pathto be able to invoke it from anywhere.

Flashing¶

To program the flash with a compiled Zephyr image after having followed the instructionsto install the Segger J-Link Software and the nRF5x Command-Line Tools, follow the steps below:

• Connect the micro-USB cable to the nRF5x board and to your computer
• Erase the flash memory in the nRF5x IC:

Where <x> is either 1 for nRF51-based boards or 2 for nRF52-based boards

• Flash the Zephyr image from the sample folder of your choice:

Where: <board> is the board name you used in the BOARD directive when building (for example nrf52_pca10040)and <x> is either 1 for nRF51-based boards or 2 for nRF52-based boards

• Reset and start Zephyr:

Where <x> is either 1 for nRF51-based boards or 2 for nRF52-based boards

USB CDC ACM Serial Port Setup¶

Important note: An issue with Segger J-Link firmware on the nRF5x boards might causedata loss and/or corruption on the USB CDC ACM Serial Port on some machines.To work around this disable the Mass Storage Device on your board as described in Disabling the Mass Storage Device functionality.

Windows¶

The serial port will appear as COMxx. Simply check the “Ports (COM & LPT)” sectionin the Device Manager.

GNU/Linux¶

The serial port will appear as /dev/ttyACMx. By default the port is not accessible to all users.Type the command below to add your user to the dialout group to give it access to the serial port.Note that re-login is required for this to take effect.

To avoid it being taken by the Modem Manager for a few seconds when you plug the board in:

Apple macOS (OS X)¶

The serial port will appear as /dev/tty.usbmodemXXXX.

Disabling the Mass Storage Device functionality¶

Due to a known issue in Segger’s J-Link firmware, depending on your operating systemand version you might experience data corruption or drops if you use the USB CDCACM Serial Port with packets larger than 64 bytes.This has been observed on both GNU/Linux and macOS (OS X).

To avoid this, you can simply disable the Mass Storage Device by opening:

• On GNU/Linux or macOS (OS X) JLinkExe from a terminal
• On Microsoft Windows the “JLink Commander” application

And then typing the following:

And finally unplugging and replugging the board. The Mass Storage Device shouldnot appear anymore and you should now be able to send long packets over the virtual Serial Port.Further information from Segger can be found in the Segger SAM3U Wiki[5].

RTT Console¶

Segger’s J-Link supports Real-Time Tracing (RTT)[6], a technology that allows a terminalconnection (both input and output) to be established between the target (nRF5x board)and the development computer for logging and input. Zephyr supports RTT on nRF5x targets,which can be very useful if the UART (through USB CDC ACM) is already being used fora purpose different than logging (such as HCI traffic in the hci_uart application).To use RTT, you will first need to enable it by adding the following lines in your .conf file:

Once compiled and flashed with RTT enabled, you will be able to display RTT consolemessages by doing the following:

Windows¶

• Open the “J-Link RTT Viewer” application
• Select the following options:
  • Connection: USB
  • Target Device: Select your IC from the list
  • Target Interface and Speed: SWD, 4000 KHz
  • RTT Control Block: Auto Detection

GNU/Linux and macOS (OS X)¶

• Open JLinkRTTLogger from a terminal
• Select the following options:
  • Device Name: Use the fully qualified device name for your IC
  • Target Interface: SWD
  • Interface Speed: 4000 KHz
  • RTT Control Block address: auto-detection
  • RTT Channel name or index: 0
  • Output file: filename or /dev/stdout to display on the terminal directly

Segger Ozone¶

Segger J-Link is compatible with Segger Ozone[7], a visual debugger that can be obtained here:

Once downloaded you can install it and configure it like so:

• Target Device: Select your IC from the list
• Target Interface: SWD
• Target Interface Speed: 4 MHz
• Host Interface: USB

Once configured, you can then use the File->Open menu to open the zephyr.elffile that you can find in your outdir/<board>/ folder.

References¶

[1]	https://www.nordicsemi.com/eng/nordic/Products/nRF51822/nRF5x-Command-Line-Tools-Win32/33444

[2]	https://www.nordicsemi.com/eng/nordic/Products/nRF51822/nRF5x-Command-Line-Tools-Linux32/52615

[3]	https://www.nordicsemi.com/eng/nordic/Products/nRF51822/nRF5x-Command-Line-Tools-Linux64/51386

[4]	https://www.nordicsemi.com/eng/nordic/Products/nRF51822/nRF5x-Command-Line-Tools-OSX/53402

[5]	https://wiki.segger.com/index.php?title=J-Link-OB_SAM3U

[6]	https://www.segger.com/jlink-rtt.html

[7]	https://www.segger.com/ozone.html

[8]	https://www.segger.com/downloads/jlink#Ozone

[9]	https://www.segger.com/jlink-software.html

Fail-safe device drivers that support SLC and MLC NAND flash and multi-bit ECC in software or hardware.

• Fail-safe in case of unexpected reset
• Very high read and write performance
• Low RAM usage
• Trial hardware available with socket for NAND flash
• Block grouping facilitates use of large NAND flashes

1. 1.About the emFile NAND Drivers
2. 2.SLC driver
3. 3.Universal driver
4. 4.Fail-safe Operation
5. 5.Wear Leveling
6. 6.Bad Block Management
7. 7.Garbage Collection
8. 8.Block Grouping
9. 9.How Devices Operate

About the emFile NAND Drivers

The emFile NAND drivers allow the file system layer to efficiently write and read blocks of data (logical sectors) to and from a NAND flash device. All the details regarding the access to NAND flash such us the identification of the NAND flash device, erasing of NAND physical blocks, writing the data page-wise, etc. are managed internally by the NAND drivers. The NAND flash device is presented to the upper file system layer as an array of logical sectors that are identified by a 0-based logical sector index.

emFile comes with two drivers for NAND flash devices:

SLC driver

Works with SLC (Single-Level Cell) NAND flash devices which require 1-bit error correction. It also comes with support for the Adesto (Atmel) DataFlash devices.

Universal driver

Universal driver - Works with all modern SLC and MLC (Multi-Level Cell) NAND flash devices. It can correct single and multiple bit errors using either the hardware ECC build into NAND flash or software ECC routines such as those provided by the emLib ECC library.

The NAND drivers are fail-safe. This means that the drivers make only atomic actions and take the responsibility that the data managed by the file system is always valid. In case of a power loss or a power reset during a write operation, it is always assured that only valid data is stored in the flash. If the power loss interrupts the write operation, the old data will be kept and the block not corrupted.

Wear Leveling

Drivers Segger Port Devices Lucie

Both NAND drivers come with support for active and passive wear leveling. The purpose of the wear leveling is to extend the lifetime of the NAND flash device by making sure that the NAND blocks are evenly erased. This is realized by keeping track of the lowest erase count and of the index of the NAND block erased last. When an erased block is required the NAND driver searches for the next available NAND block in the row and it checks the difference between the erase count of the found NAND block and the lowest erase count. If the difference is larger than a specified maximum than the NAND block with the lowest erase count is used instead to store data. This procedure guarantees that the NAND blocks which store constant data are also erased.

Blocks can go defective during the lifetime of a NAND flash which makes necessary to identify them as such. The bad block management help the NAND drivers identify and mark blocks as defective. Blocks marked as defective at manufacturing time or by the NAND driver are not used for data storage. A block is recognized as defective when the first byte in the spare area of the first or second page of that block is different than 0xFF. The driver marks a block as defective in the following cases:

• When the NAND flash device reports an error after a write operation.
• When the NAND flash device reports an error after an erase operation.
• When an uncorrectable bit error is detected via ECC on the data read from NAND flash device.

Garbage Collection

The NAND drivers perform the garbage collection automatically during the write operations. If no empty blocks are available to store the data, new empty ones are created by erasing blocks that contain invalid data. The garbage collection operation can potentially reduce the write throughput of an application since the block erase operation takes a relatively long time to complete. For applications which require maximum write throughput, the NAND drivers provide the possibility to perform the garbage collection in the application for example when the file system is idle.

Block grouping is a feature that can be used to reduces the RAM memory ussage for block management and thus allows using large capacity NAND flash devices with smaller microcontrollers. With this feature enable the NAND drivers treat multiple consecutive blocks as a single block to considerably reduce the memory used for administrating the NAND flash memory. The size of a block group is scalable according to the requirements of the application.

A NAND flash is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as for command inputs. NAND flash devices consist of a number of blocks. Every block contains a number of pages, typically 64. The pages can be written to individually, one at a time. When writing to a page, bits can only be changed from 1 to 0. Only entire blocks (all pages in the block) can be erased at a time. Erasing means bringing all memory bits in all the pages of the block to logical 1.

Small NAND flash devices (up to 256 Mbytes) have a page size of 528 bytes that is 512 for user data and 16 spare bytes for storing management information (ECC, block index, etc.) related the user data in the page. Large NAND devices (256 Mbytes or more) typically have a page size of 2112 bytes: 2048 bytes for user data and 64 bytes for management information.

The NAND drivers can handle any common page and block size, as well as logical sector sizes smaller than page size. This allows using a file system with a logical sector size of either 512, 1024 or 2048 bytes per sector on a NAND flash with 2 Kbyte pages.

For example, a typical NAND flash with a size of 256 MBytes has 2048 blocks of 64 pages of 2112 bytes (2048 bytes for data + 64 bytes spare area).

DataFlash:

DataFlash devices work in a similar way to NAND flash devices but they have capacities of only a few mega bytes.

Pin description of NAND flash

Pin	Meaning	Description
CE	Chip Enable	The CE input enables the device. Signal is active low. If the signal is inactive, device is in standby mode.
WE	Write Enable	The WE input controls writes to the I/O port. Commands, address and data are latched on the rising edge of the WE pulse.
RE	Read Enable	The RE input is the serial>CLE	Command Latch Enable	This pin should be low, when writing commands to the command register.
ALE	Address Latch Enable	When active, an address can be written.
WP	Write Protect	Typically connected to VCC (recommended), but may also be connected to port pin.
R/B	Ready/Busy Output	The R/B output indicates the status of the device operation. When low, it indicates that a program, erase or read operation is in process. It returns to high state when the operation is completed. It is an open drain output. Should be connected to a port pin with pull-up. If available a port pin which can trigger an interrupt should be used.
I/O0 - I/O7	Data Inputs/Outputs	The I/O pins are used to input command, address and data, and to output data during read operations.
I/O8 - I/O15	Data Inputs/Outputs	I/O8 - I/O15 16-bit flashes only.

Pin Description of DataFlash

Pin	Meaning	Description
CS	Chip Select	This pin selects the DataFlash device. The device is selected, when CS pin is driven low.
SCLK	Serial Clock	The SCLK pin is an input-only pin and is used to control the flow of data to and from the DataFlash. Data is always clocked into the device on the rising edge of SCLK and clocked out of the device on the falling edge of SCLK.
SI	Serial Data In	The SI pin is an input-only pin and is used to transfer data into the device. The SI pin is used for all data input including opcodes and address sequences.
SO	Serial Data Out	This SO pin is an output pin and is used to transfer data serially out of the device.

General Information

• Data transfer width is 8 bit.
• Chip Select (CS) sets the card active at low-level and inactive at high level.
• Clock signal must be generated by the target system. The serial flash chips are always in slave mode.
• Bit order requires most significant bit (MSB) to be sent out first.

DataFlash devices are commonly used when low pin count and easy data transfer are required.

More Information

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